Investigation of Digital Signal Processing of High-speed DACs Signals for Settling Time Testing
نویسندگان
چکیده
منابع مشابه
Low Settling Time All Digital DLL For VHF Application
Settling time is one of the most important parameter in design of DLLs. In this paper we propose a new high speed with low settling time Delay Locked Loop (DLL) in which a digital signal processor (DSP) is used instead of using phase-frequency detector, charge pump and loop filter in conventional DLL. To have better settling time, PRP conjugate gradient algorithm is used to optimize delay of ea...
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ژورنال
عنوان ژورنال: Universal Journal of Electrical and Electronic Engineering
سال: 2016
ISSN: 2332-3280,2332-3299
DOI: 10.13189/ujeee.2016.040204